90nm ARM9™-based Microcontroller with Hardware Floating Point and USB OTG

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The LPC3180 by NXP is an ARM9-based microcontroller that targets embedded applications requiring high performance with low power dissipation. By integrating an ARM926EJ-S™ CPU core with a large array of peripherals using the latest 90 nanometer process technology, NXP was able to achieve both objectives.

The LPC3180 can operate at over 200MHz CPU frequency (about 220 MIPS per ARM Inc.). The ARM926EJ-S CPU incorporates a 5 stage pipeline and has a Harvard architecture with separate 32 KB instruction and data caches, 64 KB of on-chip SRAM, a demand paged MMU, DSP instruction extensions with a single cycle MAC and Jazelle® Java™ byte code execution hardware.

The LPC3180 also incorporates a SDRAM interface, NAND Flash interfaces, USB 2.0 fullspeed interface with OHCI Host and On-The-Go built-in, seven UARTs, two I2C interfaces, two SPI ports, a Secure Digital (SD) interface, a Memory Stick interface and a 10-bit A/D converter, in addition to many other features.

 

Advanced Power Savings Modes
The LPC3180 supports all the normal power savings modes and includes additional powersaving features. These include full functionality at 0.9V operation, reduced leakage current design, a separate RTC domain for SRAM keepalive while running the RTC only and a multipower domain design for fine-grain control of power consumption.

 

Hardware Vector Floating Point
The LPC3180's Vector Floating Point (VFP9) co-processor provides full support for singleprecision and double-precision add, subtract, multiply, divide and multiply-accumulate operations at CPU clock speeds. It is compliant with the IEEE 754 FP standard and enables advanced motor control and DSP applications.

The LPC3180 targets embedded applications such as industrial control, set top boxes, handheld devices and power-sensitive, high performance products.

 

 

Features and Benefits Operates with speeds up to 208MHz Full functionality (low clockrate) at 0.9V High performance with low power dissipation High speed and efficiency with an exclusive hardware vector floating point unit Embedded support for Linux and other major operating systems Flexible power management for peak performance Versatility with a large array of peripherals available on-chip Optimal for very low standby power, operates on 1.2V core down to 0.9V Full operating power consumption of 0.4mA/MHz Package: 320 pin TFBGA ARM926EJ-S processor with 32kB instruction cache and 32kB data cache, running at up to 208MHz 64kB of SRAM High-performance multi-layer AHB bus system provides a separate bus for CPU data and instruction fetch, two data buses for the DMA controller, and another for the USB controller External memory interfaces: one supports DDR and SDR SDRAM, another supports single-level and multi-level NAND flash devices and can serve as an 8-bit parallel interface General purpose DMA controller that can be used with the SD card and SPI interfaces, as well as for memory-to-memory transfers USB 2.0 full-speed device, host (OHCI compliant), and OTG block. A dedicated PLL provides the 48MHz USB clock Multiple serial interfaces, including seven UARTs, two SPI controllers, and two single master I2C-bus interfaces SD memory card interface Up to 55 GPI, GPO, and GPIO pins. Includes 12 GPI pins, 24 GPO pins and six GPIO pins 10-bit ADC with input multiplexing from three pins Real-Time Clock (RTC) with separate power supply and power domain, clocked by a dedicated 32kHz oscillator. Includes a 128 byte scratch pad memory. The RTC may remain active when the rest of the chip is not powered. 32-bit general purpose high-speed timer with 16-bit pre-scaler with capture and compare capability 32-bit millisecond timer driven from the RTC clock. Interrupts may be generated using two match registers Watchdog timer Two PWM blocks with an output rate up to 50kHz Keyboard scanner function provides automatic scanning of up to an 8 x 8 key matrix Standard ARM test/debug interface for compatibility with existing tools Emulation trace buffer with 2 k x 24-bit RAM allows trace via JTAG Stop mode saves power, while allowing many peripheral functions to restart CPU activity On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal Boundary scan for simplified board testing

Applications Industrial Medical Peripheral control: printers, scanners, POS Medical devices GPS, motors, security devices, servo loops Network control Embedded Linux

 

 

LPC3180 Block Diagram

 

 

Evaluation Board Single power supply input (5.0V), regulated on board to provide all the necessary EVB voltages User Reset pushbutton switch 20 Way JTAG/ETB connector 32M (8M x 32) Bytes of SDRAM 32M (32M x 8) Bytes of NAND Flash 1 - LCD Module with Philips PCF8558 built in 1 - SD Card connector 3 - USB connectors (USB A Receptacle Connector for USB Host; USB B Receptacle Connector for USB Device; USB Mini AB Receptacle Connector for USB OTG) with Philips ISP1301 3 - UART (RS232) physical interface circuits connected to standard PC style DB9 female connectors 4 - 80 pin break-out headers, to provide easy access to many of the microcontroller pins 4 - User input pushbutton switches 2 - User output LEDs Small prototyping area consisting of an area of 0.1 inch spaced through holes with easy access to ground and 3.0V, 1.8V power supply points

Evaluation Board

 

 Application Notes for LPC3180FEL320-S

Title	Download
Protecting Microcontroller Systems against Power-Supply Imperfections
Low-cost A/D-Conversion with Philips LPC Microcontrollers
The SNERT bus specification
LPC3180 User Manual

 

 

 Featured Products

Part Number		Description	Data Sheet	App. Notes
LPC3180FEL320-S		16/32-bit ARM Microcontroller; Hardware Floating-point Co-processor, USB On-The-Go, and SDRAM Memory Interface
OM10093		Evaluation Board for LPC3180

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