Universal Cores Threaten to Keep Proprietary MPUs at ARM's Length
By Reuben Townsend
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If cost no longer rules out the use of an ARM, MIPS or ColdFire® 32-bit microprocessor (MPU) in the vast majority of applications, then what does? Reuben Townsend, Technical Sales Manager, Future Electronics Europe (UK) explains. |
The 32-bit microprocessor market has been
transformed in recent years, with the boundaries
between ARM, MIPS and ColdFire devices
diminishing enormously in terms of performance
and functionality. In addition, unit costs for 32-
bit devices, even in small volumes, are now often
below $5, so the price differences between device
types are small.
Given that ARM is a universal core, many observers
have questioned whether this similarity in
prices will impact on the choice of core for devices
currently based on Freescale’s ColdFire® or MIPSbased
proprietary solutions.
The reality is that each has its advantages
and drawbacks and there are areas in which a
proprietary core will remain preferable. The
ColdFire family, for instance, offers a rich and
diverse peripheral mix, robust on-chip security and
performance enhancing features such as cache
and maths acceleration.
By contrast, MIPS technology offers a lot of
processing power for the money – more than
500MIPS at the high end. Finally, ARM offers
low power consumption and high speed memory
configurations.
It should be noted, however, that the differences
are far less marked than the similarities. ARM
and MIPS both offer support for a wide range of
peripherals; and the ‘performance per dollar’ value
of ARM and ColdFire is far from poor. It is true that
ColdFire offers excellent hardware security but
security can also be designed into ARM and MIPS
software.
All these examples show how competitive the 32-bit
market has become. This article will therefore
give a detailed overview of the 32-bit MPU market
by comparing and contrasting the ARM, ColdFire
and MIPS architectures. All products mentioned,
including devices from NXP, Freescale and AMD,
are supplied and supported by Future Electronics.

Figure 1: ARM7TDMI Block Diagram
ARM Processors
ARM is a family of processors maintained and
promoted by ARM Holdings Limited. ARM does
not manufacture its own processors. Instead,
it designs the CPU cores for customers based
on the ARM core; they charge the customers
licensing fees on the design, and then lets them
manufacture the chip wherever they choose.
ARM’s low core power consumption has made it
a popular choice for portable applications. Most
mobile phones and Personal Digital Assistants
(PDAs) contain an ARM-based CPU. Also, because
every ARM processor shares the same instruction
set, one ARM device’s software is almost always
compatible with that of another.
Most ARM cores indicate their key features in
their name. ‘D’ stands for Debugging support,
‘M’ for enhanced Multiply (usually 64-bit), and ‘I’
for ICEbreaker™ on-chip support for in-circuit
emulation.
Another common letter is ‘T’ which stands for
‘Thumb’. This is a specialized instruction set for
RISC processor cores that consists of a subset of
16-bit instructions. These 16-bit instructions are a
kind of shorthand for commonly used 32-bit ARM
instructions; they require less memory. (Note: not
all 32-bit instructions are, of course, expressible
in this way.)
The ARM7TDMI mid-range 32-bit core, as shown
in Figure 1, is a popular ARM device for general
embedded use (rather than for specialized
applications such as telecoms, video and
audio, for which other ARM cores are more
suited). Many vendors’ devices include peripherals
such as SRAM/Flash controllers, UARTs,
SPI interfaces, USB, Ethernet, CAN, general purpose
I/O, Analog-to-Digital Converters (ADCs),
Digital-to-Analog Converters (DACs), Pulse
Width Modulation (PWM)/
timers and interrupts.
The ARM memory
interface has been
designed to allow its
performance potential
to be realized without
incurring high costs in the
memory system. Speed
critical control signals
are pipelined to allow
system control functions
to be implemented
in standard low power
logic, and these control
signals can be used to exploit
the fast burst and page
access modes offered
by industry standard
dynamic RAMs.
In the real world, of
course, while this
provides for a low cost
memory system, it also
means you have to be careful about memory
access when designing with an ARM7 core.
Besides offering a substantial list of peripherals,
NXP, for instance, has modified and improved
memory access on its ARM7 chips.
ARM7 code is capable of running at up to 70MHz
with single cycle execution of many instructions.
The on-chip Flash memory, however, has an
access time of typically 30ns, which limits
processor execution to a peak of 33MHz. Clearly,
running from Flash would leave a lot of processor
performance unused.
In order to overcome these problems, NXP has
designed a Memory Accelerator Module (MAM),
as illustrated in Figure 2. On the NXP LPC2106
ARM7TDMI device, this splits the 128kbyte Flash
into a pair of 128-bit-wide memory banks. This
allows four instructions to be fetched by each Flash
access, and is further accelerated by interleaving
the code between the two banks

Figure 2: NXP’s Memory Accelerator Module in its LPC2106 ARM Device
Freescale ColdFire MPUs
The Freescale ColdFire is an aggressively priced
processor architecture that is designed to
address the performance needs of a huge range of
embedded systems. Its ancestry stretches back
to the 68000 architecture introduced 20 years
ago, but is today offered in Version 2, 3 and 4e
(or V2/V3/V4e) evolutions. These are indicated in
the second number of product family codes such
as MCF52xx, 53xx and 54xx. Figure 3 shows the
MCF523x family block diagram.
Many ColdFire processors offer around 100MIPS
performance; the latest V4 devices offer
400MIPS.
ColdFire processors feature a variable length
instruction word of 16, 32 or 48-bits to reduce
memory and system costs. Most instructions
(such as the signed multiply) become encoded in
16-bits; complex instructions in 32 or 48-bits. The
advantage is that the code becomes very compact,
reducing the amount of Flash memory required.
Freescale tests on ColdFire and MAC71xx (ARM)
show that ARM native code is 27% larger than
ColdFire; in ARM’s Thumb mode, ARM code is only
7% smaller than ColdFire.
The static ColdFire core is also completely
synthesizable, and will easily integrate with
memories, system modules and peripherals.
(Note: like ARM, the ColdFire core is synthesized
and portable, and has been licensed to third
parties.) ColdFire cores are backward compatible
and allow future code migration to new parts,
and offer a rich peripheral features list. They also
tend to be very cost competitive with comparable
ARM7/ARM9 variants.
It is also often assumed that ColdFire returns
poorer power consumption figures than an ARM
core. It is true that ARM offers very low core
power consumption, but when the device power
consumption is considered (using information
supplied by Freescale and calculated from
comparable device data sheets), a ColdFire part’s
performance canbe little different from that of an
ARM device.
This would help explain why ColdFire cores are
finding their way into an increasing number of
consumer applications including printers, home
gateways, MP3 players and network access
servers.
Of course, ColdFire’s obvious strength is peripheral
support. Peripherals commonly found in ColdFre
devices include Ethernet, DDR support, serial
interfaces, USB OTG, PCI and LCD. ColdFire also
offers excellent on-chip security options including
an integrated hardware security engine available
on ColdFire MCF547x/548x families, and encryption
hardware accelerator modules on the MCF523x/
527x families. This can prove vitally important in
IP internet and Ethernet applications.

Figure 3: MCF523x Block Diagram
MIPS CPU Cores
As with ARM, the company steering MIPS –
MIPS Technologies Inc. – licenses CPU cores to
third-party manufacturers. Unlike ARM, however,
there are many varieties of the instruction set.
32-bit and 64-bit MIPS implementations are
available from a range of semiconductor vendors
including AMD.
One of the most important benefits of MIPS is that
all usage models are supported. This means there
is a wide and varied selection of products, all of
which are compatible, from multiple vendors.
You can therefore purchase stand alone
processors, integrated processors, hard macro
cores for implementation on high performance
SoC (System-on-Chip) devices, synthesizable
cores for SoC implementations at the lower end of
the performance spectrum, and finally, a full
architectural license to create your own
synthesizable or hard core implementation directly
from the instruction set architecture.
With all of these usage models supported, it allows
anyone who wants to use the MIPS architecture to
access the technology at any step, and then scale
their product line up or down as the need arises.
To ensure code compatibility between devices, the
MIPS architecture has a certification program.
One family of MIPS devices, AMD’s Alchemy
Au1x00 series, is aimed at video and high intensity
computation in applications such as media
players, voice over-internet protocol, network
infrastructure and video streaming.
The 32-bit Au1200 processor, as shown in Figure
4, supports MPEG1, MPEG2 and MPEG4, WM9,
H.263, DivX 3-5 and H.264 in Common Intermediate
Format resolution; has a DDR SDRAM
controller; 333MHz, 400MHz and 500MHz versions;
separate data and instruction caches;
an LCD controller with 32-bit RGB support
for up to 1024 x 768 resolution; USB2.0 host/
device functionality; and a camera interface
module. Its 32-bit Au1550 cousin adds advanced
peripherals including PCI, a security engine and a
programmable serial controller.
One key advantage of MIPS’ strength in audiovisual
applications is that it can cut the number
of development environments a designer needs
to use when bringing an application to market. In
audio, for instance, one MIPS chip could be used
for DSP audio algorithms and another for control.

Figure 4: AMD’s Au1200 Processor Block Diagram
Conclusions
There are no hard and fast rules for discriminating
between ARM, ColdFire and MIPS. In some cases
the application will dictate the selection; in others
– particularly in relation to ARM and ColdFire – the
designer’s personal preference may be crucial.
Designers have never had more choice in the
32-bit processor market, which is why Future
Electronics– a supplier of ARM, ColdFire and MIPS
devices – is a useful ally.