Announcing the Highest 4-Megabit Density FRAM with Quadruple the
Memory Capacity
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Based on groundbreaking 130nm process developed by Texas Instruments in partnership with Ramtron. |
The FM22L16 is the semiconductor industry’s
highest density FRAM, a 4-Mbit, 3V, parallel nonvolatile
RAM that breaks new technological ground.
It is manufactured on TI’s advanced 130nm CMOS
process.
The FM22L16 is a 256Kx16 nonvolatile memory
that reads and writes like a standard SRAM. A
ferroelectric random access memory or FRAM
is nonvolatile, which means that data is retained
after power is removed. It provides data retention
for over 10 years while eliminating the reliability
concerns, functional disadvantages and system
design complexities of battery-backed SRAM
(BBSRAM). Fast write timing and high write
endurance make FRAM superior to other types
of memory.
The FM22L16 includes a low voltage monitor that
blocks access to the memory array when VDD
drops below a critical threshold. The memory is
protected against an inadvertent access and data
corruption under this condition. The device also
features software-controlled write protection. The
memory array is divided into 8 uniform blocks,
each of which can be individually write protected.
Interface: Parallel
Density: 256Kb x 16
Speed: 55ns
Idd:18mA
Vdd: 2.7-3.6V
Package: 44-pin TSOP-II
4Mbit Ferroelectric Nonvolatile RAM
- Organized as 256Kx16
- Configurable as 512Kx8 using /UB, /LB
- Page Mode Operation to 40MHz
- Advanced high reliability Ferroelectric process
SRAM Compatible
- JEDEC 256Kx16 SRAM pinout
Inadvertent Writes
- Software programmable block write protect
Superior to Battery-Backed SRAM Modules
- No battery concerns
- Monolithic reliability
- True surface mount solution, no rework steps
- Superior for moisture, shock and vibration
Low Power Operation
- 2.7V – 3.6V power supply
- Low standby current using ZZ pin
Industry Standard Configuration
- Industrial temperature -40°C to +85°C
- 44-pin “Green”/RoHS TSOP-II package

FM22L16 Block Diagram
FRAM Technology Basics
When an electric field is applied to a ferroelectric crystal, the central atom moves in the direction of the field. As the atom moves within the crystal, it passes through an energy barrier, causing a charge spike. Internal circuits sense the charge spike and set the memory. If the electric field is removed from the crystal, the central atom stays in position, preserving the state of the memory. Therefore, the FRAM memory needs no periodic refresh and when power fails, FRAM memory retains its data. It's fast, and doesn't wear out!
FRAM memory technology is compatible with industry standard CMOS manufacturing processes. The ferroelectric thin film is placed over CMOS base layers and sandwiched between two electrodes. Metal interconnect and passivation complete the process.
Ramtron's FRAM memory technology has matured significantly since its inception. Initial FRAM memory architectures required a two-transistor/two-capacitor (2T/2C) memory architecture, which resulted in relatively large cell sizes. Recent advances in ferroelectric materials and processing have eliminated the need for an internal reference capacitor within every cell in the ferroelectric memory array. Ramtron's new one-transistor/one-capacitor cell architecture operates like a DRAM using a single capacitor as a common reference for each column in the memory array, effectively cutting the required cell area in half compared to existing 2T/2C architectures. The new architecture significantly improves the die leverage and reduces manufacturing costs for resulting FRAM memory products.
Ramtron has also migrated to smaller technology nodes to increase the cost effectiveness of FRAM memory cells. A recent move to a 0.35-micron manufacturing process reduces the operating power and increases the die leverage per wafer compared to earlier generations of Ramtron’s FRAM products built on the company’s existing 0.5-micron manufacturing line.
All of these exciting developments in FRAM memory technology are finding their way into a host of applications that people use everyday. From office copiers and high-end servers to automotive airbags and entertainment systems, FRAM memory is improving an array of products and applications worldwide.
How FRAM Differs from Floating Gate Technology
FRAM memory has several advantages over products that use floating gate storage technology such as EEPROM or Flash. Floating gate devices have poly silicon gates isolated from the channel by a thin oxide layer (see item 1 in figure below).
To program the device, high voltage is generated on the control gate to accelerate the electrons (N-channel device) toward the source (see item 2 in figure below). As a result, the electrons gain sufficient kinetic energy to penetrate the insulating layer and are trapped in the poly silicon material (see item 3 in figure below).
The programming process for floating gate technology takes several milliseconds, which is an inordinately long time for high-performance applications. FRAM can write in billionths of a second, compared to millionths of a second with floating gate technologies. The programming process is also destructive to the insulating layer. As a result EEPROM and Flash devices have a limited write endurance of typically 100,000 to 1,000,000 writes compared to 1,000,000,000,000 or more for FRAM.
Any finally, high voltages are required to program floating gate technologies whereas FRAM can operate with a relatively low 3-volt power supply.
Featured Products
| Part Number |
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Description |
Data Sheet |
App. Notes |
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| FM22L16-55-TG |
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4-Megabit Density FRAM
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refers to New Product Introduction